'Our expanded collaboration with Siemens EDA will help us deliver advanced design enablement solutions that address the evolving needs of our customers,' said
Siemens and Samsung: boosting 3D-IC manufacturability
Siemens and Samsung Foundry recently collaborated to update process design kits (PDKs) that seamlessly integrate into Siemens' Xpedition Substrate Integrator (XSI) software and Xpedition Package Designer (XPD) software - an achievement that allows Samsung to deliver robust PDK updates to mutual customers with minimal disruption to design processes. Siemens' XSI software empowers engineers to construct a comprehensive digital twin model of an entire multi-die device, enabling seamless design integrations capable of driving all downstream design, analysis, verification, and signoff activities.
Samsung also successfully evaluated Siemens' digitally integrated
Samsung certifies multiple Siemens EDA product lines and reference flows
Among the many additional recent achievements of the Siemens EDA/Samsung partnership are: Siemens' Calibre nmPlatform software for integrated circuit (IC) verification signoff, which includes Siemens' new Calibre DesignEnhancer software, is now fully certified for Samsung Foundry's latest and greatest process technologies. More specifically, Samsung has qualified Siemens' Calibre xACT parasitic extraction tool for the foundry's multi-bridge-channel FET (MBCFET), an optimized version of Gate-All-Around (GAA) transistor technology. Siemens used novel methodologies for the efficient technology description and accurate extraction of parasitics of advanced transistor technologies beyond 3nm.
Samsung and Siemens have also leveraged AI-powered custom IC verification technologies such as Solido Design Environment and Solido Characterization Suite software to enhance variation-aware verification and characterization, as well as Solido Crosscheck software for comprehensive IP quality assurance.
Samsung has qualified Siemens' Analog FastSPICE (AFS) platform for the foundry's latest processes for SPICE accurate applications. Siemens' AFS platform is now certified across Samsung Foundry's FinFET, Extreme UltraViolet (EUV) and GAA fabrication processes (SF4X, SF3P, SF2). AFS is also now qualified for Samsung Foundry's fully depleted-silicon on insulator (FD-SOI) LN18FDS process technology. With these certifications, mutual customers can now verify their designs using Siemens' AFS platform with SPICE accuracy and high performance.
The two organizations have successfully continued their collaboration around open model interface (OMI) development with Si2's
Samsung has also certified Siemens' Aprisa software for digital implementation for the foundry's SF3P process node. With this certification, customers using Aprisa for digital implementation tasks can design projects at SF3P with fully certified technology, proven correlation with Siemens' Calibre sign-off tools and support for all the design rules and features of Samsung Foundry's advanced GAA process technology platform.
Further, Samsung and Siemens have created new design implementation solutions that improve power structure robustness and reduce design cycle time. Calibre DesignEnhancer, which is part of Siemens' Shift Left initiative, takes the foundry's rules and automatically performs layout optimization tasks that enhance the customer's design. Calibre DesignEnhancer currently has three use models that use the Calibre platform to deliver DRC clean results, and multiple customers have successfully proven all three Calibre DesignEnhancer use models.
DE Via, which maximizes via insertion to minimize IR drop, DE Pge, which inserts both vias and parallel interconnects that optimize the power structure to achieve EMIR targets, and DE Pvr, which can save hours by effectively inserting DCAP and Filler cells that are required to run physical verification.
From an IC Test perspective, the partners have established a new design methodology reference flow that supports high-quality testing and precise diagnosis for Samsung's advanced nodes. Built on DFT technology in Siemens' Tessent software featuring Siemens' Tessent TestKompress software, CellModelGen and Diagnosis engines, the solution generates comprehensive fault models, enabling physical defect-based Automatic Test Pattern Generation (ATPG) and scan diagnosis. Covering a wide range of defects, including cell-internal bridge, open, transistor, and port defects, as well as critical area-based interconnect bridge and open and inter-cell bridge defects, this advancement addresses zero DPPM and diagnosis challenges for inside cell and interconnects.
'In today's fast-paced IC design and fabrication landscape, synergy between partners is essential to meeting the increasingly challenging and complex requirements of our mutual customers,' said
Contact:
Email: press.software.sisw@siemens.com
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