Advantest Corporation will showcase its latest IC test solutions at SEMICON West 2024 on July 9-11 at the Moscone Center in San Francisco. Advantest will highlight its broad portfolio of test technology for applications, including AI and high-performance computing (HPC), 5G, automotive and advanced memory. In addition, as one of the founding members of SEMI's Semiconductor Climate Consortium (SCC), the company plans to promote its ESG initiatives at 2024's SEMICON West.

Product Displays: Advantest will be located at booth #1039 in the South Hall. This year?s display will feature key test solutions that enable innovation and technology essential to its daily lives. Products include: NEW: The DC Scale XHC32 power supply, offering 32 channels with an unprecedented total current of up to 640A and unique safety capabilities for unmatched equipment protection to optimize test of AI, HPC, and other high-current devices; Pin Scale Multilevel Serial that is both the first native and fully integrated HSIO instrument expanding the V93000 EXA Scale platform to address signaling requirements for advanced communication interfaces; HA1200, offering die test capability with active thermal control to enable at-speed 100% test coverage before the dies are assembled into 2.5D/3D packages; CREA?s power semiconductor test equipment for a wide variety of power devices, including SiC and GaN power testing on wafer, single-die, substrate, PKG, and module, typically used in industrial and automotive applications; T2000 SoC test systems with Rapid Development Kit (RDK) for all SoCs, including automotive and power analog, and IP Engine 4 test solutions for fastest image processing to reduce CIS testing time and costs; ACS Real-Time Data Infrastructure (ACS RTDI?), an open solutions ecosystem enabling streaming data access and real-time analytics with integrated test software and hardware monitoring and control to improve semiconductor device yield, quality, and capacity; Next-generation Flash/NVM test solutions, such as T5851-STM32G, capable of testing and covering the latest generation of embedded protocol NAND devices with UFS/PCIe interface up to 32 Gbps and T5230 with a combined array architecture to reduce test cost for NAND/NVM wafer test, including DRAM wafer-level burn-in (WLBI).