4DS Memory Limited advised the results of extensive analysis of the Third Non-Platform and the Second Platform Lot wafers. Background to Non-Platform Lots to date: Since 2020 the focus of Non-Platform Lots has been to fine tune and optimize the process parameters of 4DS' memory cell technology for Storage Class Memory. Over the past twelve months 4DS has completed two Non-Platform fabrication runs on imec's state-of the-art production equipment and results of these are set out below. In April 2021 4DS commenced the production of a Third Non-Platform Lot and after extensive analysis the Company now provides a technical update on the Third Non-Platform Lot. First Non-Platform Lot: The 24 June 2020 announcement stated that 4DS had measured the highest speed and endurance in the First Non-Platform Lot that have ever been recorded by the Company: The best recorded speed at near DRAM read speed exceeds Storage Class Memory requirements without the need for speed crippling error correction; Endurance is two to three times better than previously reported. Actual endurance may be significantly higher but is currently not quantified due to available lab time and test equipment capacity; and The Company also measured retention and the results remain confidential to the Company and its partners until such time as the upper limits of retention can be more accurately defined. The First Non-Platform Lot was fabricated with process condition contributions from Western Digital and imec. Second Non-Platform Lot: The 1 February 2021 announcement stated that 4DS had completed its testing of the Second Non-Platform Lot. The data from the Second Non-Platform Lot: Confirmed that the Company has been able to repeat the results for each of the key memory characteristics (speed, endurance, and retention) that were achieved with the First Non-Platform Lot;- Confirmed that significantly, 19 of the 21 device wafers were functional, a first for the Company (the two non-functional wafers were the result of being manufactured outside the imec process window); and - Provides 4DS with further valuable insights with respect to how changes in key process parameters affect these key memory characteristics; i.e. which changes increase which memory characteristic. Results of Third Non-Platform Lot: In this Third Non-Platform Lot, the Company continued to tune the parameters of its Interface Switching ReRAM technology to achieve compatibility with state-of-the-art processes currently used in high volume memory production. Analysis of the wafer results has confirmed that 4DS has been able to repeat the results for each of the key memory characteristics (speed, endurance, and retention) that were achieved with the Second Non-Platform Lot (1 February 2021 announcement"); All 23 device wafers in the lot were functional; 4DS has for the first time demonstrated fabrication of fully crystalline Pr1-xCaxMnO3 ("PCMO") at temperatures compatible with the advanced processes run in today's leading-edge high-volume memory DRAM and NAND factories; 4DS has demonstrated that this fully crystalline PCMO material reduces the cell on-resistance by an order of magnitude compared to the PCMO material fabricated in the Second Non-Platform Lot. This reduction in cell on-resistance directly translates into a significant improvement in read speed; and This significant performance improvement also means that full characterization (speed, endurance, retention) of memory cells with this fully crystalline PCMO material requires memory cells operating in a memory array where currents are controlled and limited by access devices.